Emailing: Enhanced FPGA suits compute-intensive apps

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Enhanced FPGA suits compute-intensive apps Posted: 01 Nov 2006 Capitalizing on expiring FPGA patents and an accelerating shift of FPGAs into data-path processing, startup Velogix Inc. is developing a high-performance programmable-logic platform to run the billions of operations each second needed by applications like video and imaging, test and measurement, and communications. The platform is planned for unveiling by year's end. As FPGAs grow denser and faster, they cannot only serve as logic-aggregation solutions, but can also take on data-path-dominated designs that demand significant computational capabilities. Such on-chip resources as large amounts of memory and dedicated multiplier-accumulator elements allow these FPGAs to deliver billions of multiply-accumulate operations per second and implement complex system functions. This application shift has been noted by major FPGA suppliers like Xilinx Inc. and Altera Corp., with their latest Virtex and Stratix platforms, respectively, as well as new companies like California-based Velogix. By leveraging the latest processes, FPGAs hit density and performance levels that let the chips do more data-path and computational processing, said Danny Biran, VP of product and corporate marketing at Altera. Whether used as standalone processors or coprocessors, FPGAs can often replace such dedicated functions as DSPs, or can accelerate complex algorithms that the DSP block could not execute fast enough. Altera's electronic system-level design tools make it easier to port algorithms to the FPGA by working at higher levels of abstraction, Birin said. Application-optimized platforms help Xilinx deliver better performance in different market segments, the company's senior manager for DSP marketing, Narinder Lall, said. By offering a different mix of on-chip intellectual property (IP), he said—specifically citing memory, DSP and Serdes—"we can deliver platforms better able to serve the computer, networking and signal-processing markets." Adding more system-level capabilities lets FPGAs deliver performance exceeding that of CPUs. "We are also working with software providers such as Matlab and Simulink to develop tools that make it easier for algorithm developers to port their algorithms without knowing much about the underlying FPGA fabric," said Lall. At Semico Research, Rich Wawrzyniak, senior analyst for ASICs, sees the shift to 65nm as an opportunity for FPGA vendors to increase on-chip resources and provide faster I/O pins. At the high end of the FPGA families, he expects this to give companies a big leap in compute capabilities. These observations confirm research done by Velogix, which expects to deliver a high-performance, high-capacity programmable-logic platform before the year is out. The programmable-logic products now getting final touches will take on system designs in areas like imaging, test and measurement, computation, communications and A/V, said Velogix CEO Vivek Pendharkar. While these markets have existing programmable-logic solutions, Pendharkar said, a breakthrough opportunity exists for new products to handle computationally intensive applications. With ASIC costs escalating, Pendharkar said, the timing is opportune to enter the market. Moreover, since some key programmable-logic patents have expired, there is no longer any patent overlap with the technology in development at Velogix. New platforms will have higher levels of hard IP and a novel fabric core, Pendharkar said. Along with the new fabric, Velogix will also develop easy-to-use system-implementation tools, Pendharkar said, that will deliver shorter compilation times than the tools used for current-generation FPGAs. The first implementations will use Taiwan Semiconductor Manufacturing Co.'s 90nm process technology, he said, and will offer compelling prices and performance. Acceleration's cost is falling as FPGAs offer higher capacities, said Martin Mason, director of silicon product marketing at Actel Corp. General-purpose CPUs and DSPs don't always offer needed flexibility, often making FPGAs the only alternative. SRAM-based FPGAs need dedicated compute blocks to achieve high multiply-accumulate throughputs, but on the fine-grained ProASIC flash-based FPGAs, high-performance multipliers and other compute elements can be implemented in the fabric, Mason said. - Dave Bursky EE Times This article was printed from EE Times-Asia located at: http://www.eetasia.com/ART_8800439900_0_NT_481013b7.HTM Back to Article Home