2006년 9월 13일 수요일

[GOEPEL electronic] IEEE Std 1149.1 (Boundary Scan / JTAG) Tutorial


IEEE Std 1149.1 (Boundary Scan / JTAG) Tutorial

Being standardized in 1990, this technology still is fairly new to many engineers. This tutorial will introduce you to the basics of the IEEE Std 1149.1 architecture, its operation as well as possible applications.

Table of Contents:

• [Part 1: Testing Printed Circuit Boards]
• [Part 2: The Development of a Test Procedure]
• [Part 3: IEEE 1149.1 Architecture - the Scan Cells]
• [Part 4: IEEE 1149.1 Architecture - the Registers]
• [Part 5: IEEE 1149.1 Architecture - the Instructions]
• [Part 6: IEEE 1149.1 Architecture - the Test Access Port]
• [Part 7: Testbus Connection on Board Level]
• [Part 8: The Tools]
• [Part 9: The Variety of Applications]

출처:
http://www.goepel.com/content/html_en/index.php?site=bs_tutorial&level1=scan&level2=bs_tutorial&level3=

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