The Top-10 Programmable Logic "How To" articles of 2006

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From alternative FPGA architectures to implementing three inversions using only two NOT gates (and no XOR gates), here's the "best-of-the-best" from 2006.

By Clive Maxfield / January 05, 2007

Over the last few issues of the Programmable Logic DesignLine newsletter leading up to the holidays, we've been counting down the top "How To" articles of 2006. The rating of these articles is based on the ones the visitors to www.pldesignline.com read most often. Now, for the very first time, here they are all in one place:

#10 Alternative computing solutions, from single cores to arrays of 'things'

There are many ways of performing computations, including single CPU or DSP processors (chips or cores), multiple processors, arrays of "things", and "great big piles of gates."

#9 The state-of-play in multi-processor and reconfigurable computing

When a conventional processor (core) cannot meet the needs of a target application, it becomes necessary to evaluate alternative solutions such as multiple cores and/or configurable cores.

#8: How to take advantage of partial reconfiguration in FPGA designs.

The capability of designs to leverage partial reconfiguration opens doors to a whole host of applications.

#7: How to invert three signals with only two NOT gates (and *no* XOR gates): Part 2.

In part two of this article, we consider a dynamic solution to our original problem (using a ring oscillator and other "stuff"); also, we learn how to implement a NOT gate using four AND gates!

#6: FPGA Architectures from 'A' to 'Z' – Part 2.

If you are new to FPGAs, there are a bewildering number of different architectures and related concepts; but fear not, because this tutorial explains all.

#5: All About FPGAs.

An industry expert examines field-programmable gate arrays (FPGAs), including current and forthcoming architectures, technologies, and software tools.

#4: How to implement a digital oscilloscope in Structured ASIC fabric.

Structured ASICs provide quicker time-to-market and lower development costs than standard ASICs, while also providing higher performance and lower unit costs than FPGAs.

#3: How to invert three signals with only two NOT gates (and *no* XOR gates): Part 1

Even for hardened logic designers, these solutions will delight and entertain; also, there's a new "Brain Boggler" to be pondered.

#2: FPGA architectures from 'A' to 'Z' – Part 1

If you are new to FPGAs, there are a bewildering number of different architectures and related concepts; but fear not, because this two-part tutorial explains all.

#1: An introduction to different rounding algorithms

The mind soon boggles at the variety and intricacies of the rounding schemes that may be used for different applications. In addition to introducing different techniques, this article provides real-world examples of the types of errors associated with the different rounding schemes applied at various stages throughout a digital filter.

Embarrassingly enough, #3, #2, and #1 are all three that were penned by yours truly . . . just give me a moment, I promised myself I wouldn't cry . . .

Clive "Max" Maxfield is the editor of Programmable Logic DesignLine. Max is the author and co-author of a number of books, including Bebop to the Boolean Boogie (An Unconventional Guide to Electronics), The Design Warrior's Guide to FPGAs (Devices, Tools, and Flows), and How Computers Do Math featuring the pedagogical and phantasmagorical virtual DIY Calculator.

Widely regarded as being an expert in all aspects of computing and electronics (at least by his mother), Max was once referred to as "an industry notable" and a "semiconductor design expert" by someone famous who wasn't prompted, coerced, or remunerated in any way. Max can be reached at max@techbites.com.