How you can manage multiple voltages in portables
Typically, DC-DC converters are specified to meet ±2% initial setpoint accuracy and 3% over input voltage, loading and temperature conditions until end of life. This is insufficient for performance, testing and reliability reasons. Device voltage levels for multi-voltage Processors, DSPs and ASICs have fallen to 0.9V and are approaching 0.6V, making system voltage tolerances tighter and necessitating a new way to keep these voltage levels within specifications. If these requirements are not followed, performance degradation, fault conditions such as bus contention or device latch-up can arise. This article describes the importance of accurate DC output voltage control and a method to actively control any standard adjustable DC-DC converter module, discrete DC-DC PWM controller or LDO over time and temperature. A reference design using a standard Point-of-load (POL) DC-DC converter footprint and discrete switching regulator is shown with extremely accurate ±0.2% output levels. The POL automatically adjusts supply output voltage levels under all DC load conditions with programmable supply voltage margining allowing in-system test and control. A programmable 9-channel power supply PWM controller design is shown exhibiting ±0.5% accuracy. It forms a complete portable power system under digital control allowing dynamic adjustment of output voltage levels.
The need for accuracy and programmability As processor supply levels drop, both input current and voltage accuracy requirements increase. For this reason, systems are migrating from isolated distributed power to non-isolated distributed power architectures using POL solutions to gain improved voltage regulation and control at the load (Figure 1). Isolated distributed power uses 2 or more -48V isolated step-down DC-DC converters, which then route separate lower voltage supplies across the board. In the point of load distributed architecture, the -48V powers a single isolated DC-DC converter to provide an intermediate bus voltage. This intermediate bus voltage then powers many non-isolated DC-DC converters or LDO's at the load as shown in Figure 1.
Figure 1 -- An example card design with power management functions necessary in data communications systems. These functions include Hot Swap, Supply Cascading/Sequencing and Tracking, Environmental Monitoring and Reset Control. As component power requirements change, the power management device can be in-system programmed using the I2C bus. The power supply is bussed from a main power bus and down converted directly at the load.
This architecture is more desirable because components making up the heart of the line card require lower voltages and higher currents and regulating at the load reduces inaccuracies. Power Management controllers are included to turn on/off and continuously monitor the POL supplies. Providing power at the load gives superior regulation, transient response and avoids voltage drops across PCB traces. This is necessary because as voltage levels decrease, allowable supply variations around these levels also decrease. Devices now not only require specific power supply turn on sequencing, but they also run at 1V or lower levels. These tighter limits demand more accurate control especially under changing load conditions and temperature variations to maintain optimal performance. The power system must automatically adjust and also test the limits of each board to guarantee performance and reliability. A highly integrated and accurate power supply manager, monitor and sequencer can achieve this required performance.
Processors are being marketed with various operating frequencies. For example, a processor with an operating frequency of 300MHz and a processor from the same manufacturer with an operating frequency of 700MHz are not fundamentally different. In fact, the 300MHz processor is not designed to run at 300MHz, it simply failed to perform to specification at 700MHz. Any processor manufacturer's data sheet will show that the higher performing processors are the result of processors yielding over a more stringent power supply rating.
The tighter power supply tolerances dictated by the high performance processor manufacturers have placed a heavy burden on the system designer. Typically, a processor's power supply tolerance is ±2.5%, which is ±25mV for a 1V supply. This power supply tolerance needs to be maintained over the full operating temperature of the board. When these challenges are compounded with board layout issues such as voltage drops across the power traces, board designers can find themselves in a desperate situation with a looming deadline.
There are several factors that affect the accuracy of a power supply. Take for example the standard structure of the non-isolated DC-DC converter shown in Figure 2. The resistor divider created by R1 and R2 sets the output voltage of the converter by feedback to the error amplifier against the reference voltage. This feedback keeps the inverting input terminal of the error amplifier and therefore the output of the supply equal to the converter's reference voltage. Inaccuracies in resistors R1 and R2 will cause errors in the set point of the converters output voltage. Variations in these resistors over temperature will increase the cumulative error. Errors in the converter's reference voltage also causes inaccuracy of the output voltage. Board layout can also decrease the accuracy of the DC-DC converter. Improper placement of the converter's voltage sense lines can result in uncompensated power trace IR losses to the load point.
Active DC Output Control
Active DC Output Control (ADOCTM) is one method of accurately controlling the output of a DC-DC converter or LDO to achieve high accuracy power supply voltages. Active DC Output Control is a new approach to intelligent power management. Using ADOC a designer can control the output of DC-DC converters or LDOs to ±0.2% for applications involving high performance processors. ADOC controls the output of a converter by effectively adjusting the resistors that set the output voltage of either a DC-DC converter or adjustable LDO. An ADOC solution is typically connected to a DC-DC converter as shown in Figure 2. The ADOC circuit stores the desired output voltage as a digital 10-bit value in non-volatile memory. The ADOC circuitry monitors the converters output at the load. After significant filtering and signal conditioning, the converter's output is compared to an inexpensive reference voltage accurate to ±0.1%. A decision is then made to increase or decrease the control signal to adjust the converter's output to the desired voltage ±0.2%.
Figure 2 " The ADOC connection to a standard DC-DC converter. The ADOC function Controls DC-DC Converters via the TRIM pin. The CTRIM_CAP and RTRIM component type and values are determined for optimal operation. The RTRIM resistor is not necessary for DC-DC converter modules employing an on-board Trim Resistor.
The Output voltage in Figure 2 is derived from the following equations:
Eq1...
Eq2...
Where: 0.3 = TRIM output saturation voltage
and Vnom = Nominal non-trimmed output voltage
One problem with attempting to control the output voltage of a power supply is the possibility of interfering with the power supply's feedback control loop. Using two control loops is inherently risky and sometimes results in system instability. ADOC, however, uses a system of nonlinear, inherently convergent control to maintain system stability when coupled with the converter's control loop. The control loop of a DC-DC converter is optimized for fast transient response. On the other hand, the goal of ADOC is to accurately control the DC or average level of the output voltage. For controlling the DC voltage level the ADOC control loop runs very slow at 500Hz whereas the converters control loop responds to frequencies in the tens to hundreds of kHz. This large separation of loop response alone however does not guarantee system stability. The ADOC control loop employs a nonlinear digital control element where the adjustment to the output is always of the same magnitude. This nonlinear control induces a very small ripple voltage on the converter's output voltage. For any noise in the system with a magnitude greater than this induced ripple the gain of the ADOC control loop is less than 1. For noise of magnitude less than the induced ripple the gain is greater than 1. This noise is amplified until its magnitude is greater than the induced ripple where the loop then has a gain of less than 1. This sequence is referred to as a stable limit cycle in nonlinear systems. The induced ripple can be set with the ADOC circuit to less than 100μVp-p thus rendering it negligible.
The ADOC circuit is superior to simply using higher accuracy components such as the feedback resistors and the voltage reference for several reasons. The ADOC circuit actively controls the power supply's output so changes in temperature that affect the components of the converter result in only the ultra-low temperature variation associated with the ADOC circuit itself. Also, through the use of non-volatile memory to set the output voltage, ADOC can be used to voltage margin a converter's output accurately. This margining is a common practice among board designers to determine the robustness of a design by subjecting the board to the various voltage ranges. Some products use voltage margining as a production test to ensure system reliability. A returned board from the field is costly. Given this, companies are fearful of having marginal components on their boards. This has resulted in mandates for voltage margin testing every board that is manufactured.
The mechanism of supply margining is the same as that of supply controlling: adjust and hold the DC value of the supply. So naturally, ADOC also benefits voltage margin testing. If a mandate is set to margin test boards to ±10% with supplies that are only accurate to ±4%, the results can be unpredictable. For instance, are the supplies being margined to ±6% or are they margined to ±14%? In the 6% case the reliability test is ineffective. In the 14% case, a class of boards could be subject to yield or failure loss and the false positives result in longer debug times. Using ADOC to margin voltages in these tests increases the confidence of the test because it is well known how close the testing is to the margin limits.
The margin function can also be used for performance enhancement or to digitally control brightness by adjusting white LED backlights or contrast on an LCD as well as volume levels in an audio circuit.
The converter may be an off-the shelf compact device, or may be a "roll your own" circuit residing on the system board. In either case, the Active DC Output Control function dramatically improves voltage accuracy by implementing closed-loop active control. This utilizes the DC-DC's Trim pin as shown in Figure 2 or an equivalent output voltage feedback adjustment "VADJ" or "FB" node in a user's custom circuit.
To prove the ADOC concept, a non-isolated power supply reference design is shown in Figure 3. It is a fully functional POL DC/DC converter board used to demonstrate the improvement of using a digitally programmable nonvolatile supply voltage marginer and ADOC controller. The reference design operates from a +3.3V to +5V input and includes a synchronous PWM DC-DC converter, n-channel MOSFETs, and high current inductor. A precision voltage reference internal to the ADOC integrated circuit permits the DC-DC converter to be trimmed to within a 0.2% tolerance. The power management device controls the voltage monitoring, margining and trimming of the DC-DC PWM buck controller. Voltage margining along with many other programmable features are performed through the I2C 2-wire bus and Windows GUI interface (Figure 4). The key details of the design are the 16A Output Current with internal VREF, extremely accurate (±0.2%) control automatically adjusts supply output voltage level under all DC load conditions. A wide Margin/ADOC range from 0.3V to VDD with 2 programmable general purpose monitor sensors -- UV and OV with FAULT Output Flag, monitoring status and 256 Byte EEPROM, programmable nominal, high and low trim/margin voltages.
click to enlarge
Figure 4 -- Windows GUI used to program and control the POL Reference design. All voltage levels and triggers are programmable using a Windows GUI and a PC-compatible parallel port to I2C serial bus programmer. Power management design is simplified using non-volatile programmable functions, when power is removed all settings are remembered.
Supply control using a programmable PWM controller for portable or handheld systems
To further standardization, a programmable supply voltage sequencing platform provides advantages over fixed solutions. One advantage is that a programmable solution reduces risks over changing system requirements. With a programmable solution the sequencing order can be modified and sequenced channels can be changed by simply reprogramming the controller. This minimizes the potential for having to re-spin the board when the system requirements are not clearly understood. A programmable solution also gives the designer more confidence that the board will work the first time. If a problem is encountered, reprogramming can get past the problem and onto debugging and testing the board for its intended function. On a company wide basis, the programmable solution also allows for cross platform implementation where an existing design can be reused for a unique solution by simply reprogramming.
A fully programmable power supply with integrated PWM controllers that monitors, margins, and cascade sequences provides all the power management needed in a power system. To provide a complete system, 9 voltage outputs plus voltage reference, consisting of: four synchronous PWM "buck" step-down converters, three PWM "boost" step-up converters, one PWM "boost-buck" negative DC/DC converter, and an LDO.
Figure 5 -- Typical portable power management schematic using a 9-channel, programmable DC/DC controller. This integrated supply controller/manager provides power-on/off control, cascade sequencing and output margining.
The power system is capable of power-on/off cascade sequencing where each channel can be assigned to one of 8 unique sequence positions. Supplies may also be individually powered on/off through an I2C command or by assertion of one of two enable pins. Cascade sequencing, unlike time based sequencing, uses feedback to ensure that each output is within specification before the next channel is enabled.
Each output voltage and the input voltage or battery is monitored for under-voltage and over-voltage conditions. In the event of a fault, all supplies may be sequenced down or immediately disabled. Multiple output status pins are provided to notify host processors or other supervisory circuits of system faults. An Undervoltage Lockout (UVLO) circuit ensures the controller will not power up until the input or battery voltage has reached a safe operating value. The UVLO function exhibits hysteresis, ensuring that noise on the supply rail does not inadvertently cause faults or otherwise compromise the control of the output supplies.
In the event of a system fault, all monitored supplies may trigger fault actions such as power-off, or forced-shutdown operations. Each supply output may also be turned off individually at any point using the I2C command or one of two programmable enable pins.
In portable applications powered from a main system battery the battery voltage is continuously monitored for under-voltage conditions. There are two under-voltage settings for the battery; both are user programmable and have a corresponding status output pin. When the first threshold level is reached, the POWER_FAIL pin is asserted and latched. When the second threshold level is reached on the main supply, the nBATT_FAULT pin is asserted.
Voltage margin control of all output voltages through an I2C command by at least ±10% of the nominal output voltage is included. Margining creates three pre-programmed voltage settings that each channel can be set to via an I2C command. Margining is ideal when used with a channel configured as an LED driver where margining provides three brightness settings. In addition, each output is slew rate limited by digital soft-start circuitry that is user programmable and requires no external components.
All programmable settings are stored in non-volatile registers and are easily accessed and modified over an industry standard I2C serial bus. For quick prototype development Summit offers an evaluation card and a Graphical User Interface (GUI).
Figure 6 - Power-on Cascade sequencing and Margin High/Low Waveforms. The supply channels are cascade sequenced-on to nominal voltage, margined high or low and then cascade sequenced-off. Channels 1, 2, 3, 4 are first margined high and then channels 2 and 3 are margined low. Up to 8 PWM supplies are controlled. (Ch 1 (500mV/D) = 1.25V Buck (Yellow trace), Ch 2 (500mV/D) = 2.5V Buck (Blue trace), Ch 3 (2V/D) = -7.5V Inverting Buck-Boost (Purple trace), Ch 4 (2V/D) = 12V Boost (Purple trace))
Conclusion
New digitally programmable power supply controller provide I2C programmable output voltages, Power on and off sequencing, Individual channel enable control, Battery monitoring, UV and OV monitoring on PWM outputs, Margining and Slew rate control. Actively controlling DC output voltage levels to within ±0.2% under light or full load to meet stringent tolerance requirements of high performance components further extends reliable operation and margining supplies tests system performance goals as well as providing an easy way to adjust brightness and volume control. The integration of active accuracy control, programmable features and built-in flexibility allows the system designer to create a "platform solution" that can be easily modified via software without major hardware changes. Combined with re-programmability, this facilitates rapid design cycles and the proliferation from a base design to future generations of product.
About the Authors:
Tom DeLurio is director of applications engineering at Summit Microelectronics. He is responsible for supporting customer implementation of Summit devices, evaluation kit production and new product definition. Before joining Summit, Mr. DeLurio held applications engineering management positions at Impala Linear Corporation. He has also held positions at Micro Linear Corporation, Aspen/Cypress Semiconductor, NCR Corporation's ASIC division, Honeywell, and Signetics Corporation. Mr. DeLurio has authored numerous articles for industry publications. He holds a BSEE degree from Pennsylvania State University. tom_delurio@summitmicro.com
George Hall is Staff Applications Engineer at Summit Microelectronics. He is responsible for supporting customers using Summit devices, evaluation kit design and new product definition. Before joining Summit, Mr. Hall was an applications engineering at Monolithic Power Systems. He has also held positions at Micro Linear Corporation, Micrel Semiconductor, Raynet, Computer Products, and General Electric. Mr. Hall has authored numerous application notes and holds a patent in phase-locking switched-mode power supplies. ghall@summitmicro.com
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