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Prototype Your ASIC With Stratix II FPGAs
Get Everything You Need on One CD The ASIC Prototyping Resources CD contains all of the software tools and technical details to take your ASIC designs and implement them in FPGAs:
Why Prototype My ASIC? Designing an ASIC today is an expensive and risky development due to the increasing costs of mask sets and engineering verification. Using an FPGA for ASIC prototyping provides a huge reduction in risk. Code can be compiled for the FPGA, downloaded, and debugged in hardware during the design phase. If there are errors in the functionality, the code can be modified, re-compiled, and downloaded within minutes, allowing for on-the-fly debugging. Why Use Stratix II FPGAs? Altera's Stratix II FPGAs are ideal for ASIC prototyping, offering the highest density of any FPGA available today. Designs of up to 2.2 million ASIC gates plus 9 Mbits of memory may be implemented in a single Stratix II EP2S180 device. If your design is larger than this, the Stratix II devices will let you implement your functionality in the smallest number of FPGAs, giving you control over how you want to partition your design. What Tools Do I Need? Altera's Quartus II design software allows the compilation of a design (including synthesis) without any other software. Quartus II software will also integrate your current design flows from the major ASIC vendors. Details on how to interface and integrate the Quartus II software with third-party EDA software are contained in the Quartus II handbook on the CD. Altera and its third-party partners also offer development tools containing one or more Stratix II FPGAs. What If I Need A Low-Risk Path to Structured ASICs? Stratix II FPGAs offer the industry's only seamless development path from FPGA prototype to high-volume, structured ASIC production with support for migration to HardCopy II structured ASICs. Designing with HardCopy II devices allows users to reduce development costs and still get the flexibility and time-to-market advantages associated with FPGAs. Reduce Your Risk - Prototype Your ASIC With Stratix II FPGAs | ||
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