Introduction
Providing the voltages and currents to the latest 130nm and 90nm FPGAs can be a real challenge. One design approach that is becoming popular is the POL, or "Point of Load" design technique. The POL technique places the power supplies right at the device being powered, hence the name. The advantages gained by such techniques include better power supply regulation, less bounce and noise, and fewer costly printed circuit boards. This article discusses these advantages.
Better Power Supply Regulation
An immediate advantage of placing the power supply close to the load (see Figure 1) is that there is less resistance to the powered device. This results in a lesser drop in voltage at the powered device. Additionally, the dynamic performance of the power supply is improved, as there is no longer a time lag from a change in load; this is due to a corresponding change in power supply current sourcing that results from both the series resistance and series inductance.
With improved dynamic load regulation, the number and values of the larger bypassing capacitors may be reduced in size, as the supply is now capable of providing the necessary current to the device. The reduction in the numbers and values of capacitors will also save board area and cost, as well as improve the reliability.
Figure 1: Location of Power Supply vs. Location of FPGA
Less Bounce and Noise
If a power supply is designed for an extremely fast dynamic response, the reduction in filtering can be substantial. If the power supply has a more traditional load response, the reduction in large value capacitors may not be a choice.
Reducing the capacitance and using a fast dynamic POL power supply only makes the dynamic response better. The bounce and noise on the device is lessened as the series inductance is reduced from the supply to the load.
Fewer Costly Printed Circuit Boards
In order to control the series inductance in the ground plane, it is sometimes necessary to have more than one power and ground plane per power supply in a traditionally designed board. The inductance is just too great for one plane to get the power from the power supply in the corner to the device.
If the power supply is placed right at the load, the inductance on even a single plane is now acceptable. The drop from a 26-layer board to a 22-layer board will more than cover the cost of a higher performance POL supply.
Design Examples
One example POL design concept involves a PCI development card for a Virtex-II Pro™ 2VP7 or 2VP20 device. The board has six layers and two Bellnix(1) ultra-fast dynamic switching powers supplies, one for the 1.5V core supply, and one for the 3.3V I/O supply.
The oscilloscope picture below shows the 3.3V supply when the PCI card is idle:
In the picture below, the PCI card is being exercised with a program to read and write data:
As you can see, the Vcco noise increases from +/- 4 mV peak-to-peak to +8/-6 mV peak-to-peak. This measurement was made with an attenuator in line, so the actual value is two times that shown (or 16 mV peak-to-peak) versus 28 mV peak-to-peak. This is a wonderfully small amount of noise to measure on a 3.3V device that is driving a PCI bus.
Plots made with a spectrum analyzer also confirm the extremely low level of noise present on the power supplies.
Summary
The POL technique provides the following advantages:
- fewer power and ground planes
- better regulation
- less noise
- improved decoupling that requires fewer (or no) large value capacitors.
However, the best performance will not be achieved unless good power distribution design engineering practices are employed. Just because the power supply is placed near the load does not mean that benefits will necessarily be possible.
Such a design can benefit only when the power supply itself has fast dynamic performance and is designed to offer all of the POL benefits, and when all factors of the power distribution system on the printed circuit board are also taken into account.
(1) Bellnix, Company, Limited
http://www.bellnix.com
Japan: 81-48-864-7733
US: 408-249-5325
BSV-1.8S7R0M 20W 3V-5.5V input
1V-3.3V output Ultra-Fast Transient Step Down
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