HDL-design challenges and philosophies for real-world ASIC implementations

HDL-design challenges and philosophies for real-world ASIC implementations

Prototyping with FPGAs works best if you do it with the final ASIC in mind.

By Jesse Chen, Silvus Technologies -- EDN, 7/24/2008

출처: http://www.edn.com/article/CA6578135.html?industryid=47039&nid=2435&rid=228590015