http://eetimes.eu/design/showArticle.jhtml?articleID=206101910&printable=true <http://eetimes.eu/design/showArticle.jhtml?articleID=206101910&printable=true>
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EE Times updates list of emerging startups
Peter Clarke <mailto:PClarke@cmp-europe.com>
(02/01/2008 10:53 AM EST)
URL: http://eetimes.eu/design/206101910 <http://eetimes.eu/design/206101910>
The EE Times 60 Emerging Startups list, first published in April 2004, has been updated to version 7.0 to reflect the latest corporate, commercial, technology and market conditions.
Some companies have dropped off the list — otherwise known as the Silicon 60 — because they have been acquired; some have moved on to an initial public offering of shares; and others have moved beyond the list with the passage of time. As they have matured other, younger startups have been nominated to be moved off the EE Times radar list and on to the main list. At this iteration 15 companies have been brought on to the list.
The companies in version 7.0 of the EE Times Emerging Startups list have been selected by editors based on a mix of criteria including: technology, intended market, maturity, financial position and management and investment profile.
The startups on the Silicon 60 list are the companies involved in semiconductor chips, memory, MEMS, EDA software, embedded applications, foundry manufacturing, semiconductor production equipment, electronics subsystems, packaging and materials that have made an impression on EE Times editors. They are emerging companies to watch — for a wide variety of reasons.
Readers are welcome to nominate their own emerging startups for inclusion in a future iteration of the EE Times 60 Emerging Startups list. Nominations should be supported by a short citation explaining why the company is suitable for inclusion on the list.
Send comments and nominations to Peter Clarke (pclarke@cmp.com).
EE Times 60 emerging startups list version 7.0
Achronix Semiconductor Corp. (San Jose, Calif.) is a startup company associated with Cornell University from where it has licensed patents. In April 2006 the company announced a prototype field programmable gate array that it said can operate at clock frequencies of 1.93-GHz. www.achronix.com <http://www.achronix.com>
Advanced Micro-Fabrication Equipment Inc. (Shanghai, China), founded in 2004 and also known as AMEC, has been described as the Applied Materials of China. Indeed AMEC, having rolled out its initial tools, unveiled its strategy and disclosed plans to go public, has also locked legal horns with Applied. www.amec-inc.com <http://www.amec-inc.com>
Ambric Inc. (Beaverton, Ore.), founded in 2003, is a fabless semiconductor company developing a software-programmable IC platform based on a programming model for massively-parallel embedded computing. www.ambric.com <http://www.ambric.com>
Arteris Inc. (San Jose, Calif.) started in Paris in 2003 as is an intellectual-property vendor commercializing a packet-based on-chip network. The company has moved its headquarters to Silicon Valley while maintaining a French subsidiary. www.arteris.com <http://www.arteris.com>
Artimi Inc. (Santa Clara, Calif.), founded in 2002, is a fabless semiconductor company developing single-chip Ultra Wideband (UWB) transceivers with R&D in Cambridge, England, and sales offices in Japan and Taiwan. www.artimi.com <http://www.artimi.com>
ATEEDA Ltd. (Edinburgh, Scotland), founded in 2006, specializes in testing circuits have both analog and digital sections and has developed a tool that allows analog circuits to be tested on digital testers. www.ateeda.com <http://www.ateeda.com>
Atoptech Inc. (Santa Clara, Calif.), founded in 2003, has developed physical design EDA tools. Aprisa, based on AtopTech’s interconnect-centric optimization technology, supports design closure at 90nm, 65-nm and below. www.atoptech.com <http://www.atoptech.com>
Azuro Inc. (Santa Clara, Calif.) was founded in 2002 by Paul Cunningham and Steev Wilcox. The company has developed a technology for clock-tree synthesis that supports optimization for power consumption reduction. www.azuro.com <http://www.azuro.com>
Blaze DFM Inc. (Sunnyvale, Calif.), founded in October 2004, provides software to support "electrical DFM" and parametric yield for sub-100-nm circuits. The company landed $10 million in series B venture capital funding in March 2007 while also disclosing completion of its previously announced merger with Aprio Technologies Inc. www.blaze-dfm.com <http://www.blaze-dfm.com>
Boston Circuits Inc. (Burlington, Mass.), established in 2005, is a fabless multicore processor company focused on the embedded multimedia market. The gCORE family of processors ranges from eight to 16 processor cores on a single chip. www.bostoncircuits.com <http://www.bostoncircuits.com>
Calypto Design Systems Inc. (Santa Clara, Calif.), founded in 2002, is a privately held EDA company focused on bridging electronic system-level design and integrated circuit implementation with an emphasis on sequential analysis and optimization for power consumption. www.calypto.com <http://www.calypto.com>
ChipSensor Ltd. (Limerick, Ireland), founded in 2006, is developing a technology that allows the surface of an IC to be used to sense temperature, humidity, certain gases and pathogens. The technology could be used to add functions to present day chips such as processors, or to produce new types of integrated smart sensor. www.chipsensors.com <http://www.chipsensors.com>
Ciranova Inc. (Santa Clara, Calif.), founded in 2002, is a privately held EDA company focused on offering support to authors of parameterized cells. Since early 2006 the company has offered free downloads of PyCell Studio, which can be used to create OpenAccess p-cells. www.ciranova.com <http://www.ciranova.com>
Dafca Inc. (Framingham, Mass.), founded in 2003, is a provider of EDA software tools that help insert reconfigurable infrastructure for system-on-chip devices. www.dafca.com <http://www.dafca.com>
Emotiv Systems Inc. (San Francisco, Calif.), founded in 2003, is developing bio feedback systems based on a sensor cap. Such systems are likely to transform the way humans interact with computers and therefore with the electronic world. www.emotiv.com <http://www.emotiv.com>
EnOcean GmbH (Oberhaching, Germany) was founded in 2001 as a spin-off from the research labs of Siemens AG. Its charter is to create sensors that are wireless, that scavange energy from the environment and are reliable enough to be maintenance free. www.enocean.com <http://www.enocean.com>
GainSpan Inc. (Sunnyvale, Calif.) is a developer of Wi-Fi sensor network technology. The company was an Intel incubator company before being spun out in 2006. In December 2007 the company completed its Series B funding round, raising $20 million with backing from Intel Capital. www.gainspan.com <http://www.gainspan.com>
Handshake Solutions NV (Eindhoven, Netherlands), has worked with ARM Holdings plc to produce an asynchronous processor based on the ARM9 core. The ARM996HS, claimed to be the first commercial clockless processor, was disclosed in February 2006 along with the claim that it could cut power consumption to nearly one third that of a similar clocked processor core. www.handshakesolutions.com <http://www.handshakesolutions.com>
HelioVolt Corp. (Austin, Texas), founded in 2001, has developed a new slant on compound semiconductors to produce a photovoltaic process that could beat existing technologies in cost of production as well as efficiency. A process based on rapid thermal annealing and anodic bonding allows copper-indium-gallium-selinide (CIGS) films to be deposited on just about any substrate. In October 2007 the company closed a $101 million Series B round of funding. www.heliovolt.com <http://www.heliovolt.com>
Hindustan Semiconductor Manufacturing Corp. (Bangalore, India), has been formed by a team of Silicon Valley based expatriate Indians with a view to building a series of wafer fabs near Hyderabad, India. The company has signed a memorandum of understanding that it will license 130-nanometer CMOS process technology from Infineon Technologies AG and make chips for cell phones, smartcards and automotive applications for the Indian market. www.hmscindia.com <http://www.hsmcindia.com>
Icera Semiconductor Inc. (Bristol, England), a fabless semiconductor company founded in 2002, provides chips for 3G-HSDPA handsets and datacards. It was founded by, amongst others, the founder of Element14 Ltd., a company which was eventually sold to Broadcom Corp. www.icerasemi.com <http://www.icerasemi.com>
Imperas Inc. (Palo Alto, Calif.) was formed in 2005 by Simon Davidmann, a serial EDA entrepreneur. The company plans to offer system development tools that combine the elaboration of both hardware and software while dealing with multiprocessing issues. www.imperas.com <http://www.imperas.com>
Innovative Silicon Inc. (Santa Clara, Calif.) is a 2002 start-up founded by Pierre Fazan (CTO) to develop an SOI-based single-transistor memory. Now led by Mark-Eric Jones, Innovative has licensed its “floating body†memory to Advanced Micro Devices Inc. amongst others. www.innovativesilicon.com <http://www.innovativesilicon.com>
InvenSense Inc. (Sunnyvale, Calif.), founded in 2003 by CEO Steven Nasiri, is a fabless developer of motion-sensing MEMS for consumer products based on the Nasiri fabrication process. www.invensense.com <http://www.invensense.com>
Kenet Inc. (Woburn, Mass.) is a fabless semiconductor company founded in 2003 to bring to market mixed-signal technology developed at the Massachusetts Institute of Technology, particularly in the area of low-power conversion. www.kenetinc.com <http://www.kenetinc.com>
Kovio Inc. (Sunnyvale, Calif.) was spun out from the MIT Media Laboratory by a team of scientists in 2001. The company is developing manufacturing technology that is expected to combine the low cost of graphics printing with the power and functionality of silicon-based semiconductor integrated circuits. www.kovio.com <http://www.kovio.com>
Light Blue Optics Ltd. (Cambridge, England) was founded in December 2003 by photonics researchers from Cambridge University Engineering Department. They set out to produce small, portable, power-efficient image projectors suitable for use in battery-powered electronic devices such as mobile phones and digital cameras. www.lightblueoptics.com <http://www.lightblueoptics.com>
Luminescent Technologies Inc. (Palo Alto, Calif.), backed by Sevin Rosen Funds, has developed a line of RET software products based on inverse lithography correction for use in optical proximity correction and phase-shift photomask applications. www.luminescent.com <http://www.luminescent.com>
EE Times 60 emerging startups list version 7.0
Maxscend Technologies Inc. (Shanghai, China), is a venture capital backed fabless IC company founded by a group of Silicon Valley returnees in April 2006. The company has designed and started shipping, a DAB/DAB+/DMB demodulator IC which can be used for mobile digital television reception in mobile phones, personal media players, USB dongles, and vehicle entertainment systems. www.maxscend.com <http://www.maxscend.com>
Mirics Semiconductor Inc. (Fleet, England), a fabless RF and mixed-signal chip startup founded in 2004, has started sampling OEMs in the mobile TV, digital radio and portable media player sectors with a single-chip tuner that can be used on multiple broadcast standards. www.mirics.com <http://www.mirics.com>
Molecular Imprints Inc. (Austin, Texas) was founded in 2001 to design, develop, manufacture and support imprint lithography systems to be used by semiconductor device and other industry manufacturers. www.molecularimprints.com <http://www.molecularimprints.com>
NanoIdent Technologies AG (Linz, Austria), has built a factory to pioneer the production of printed plastic semiconductors. The company is focused on printed photonic sensors for applications in the industrial, biometric, and life science markets. www.nanoident.com <http://www.nanoident.com>
Nanoradio AB (Kista, Sweden), fabless semiconductor company specializing in components for Wi-Fi applications, has raised more than $50 million in venture capital funding since its founding in 2004. www.nanoradio.com <http://www.nanoradio.com>
Nemerix SA (Manno, Switzerland), founded in April 2002, is a venture capital backed fabless semiconductor company specializing in global positioning by satellite integrated circuits, software and firmware. Cadence Design Systems Inc. was one of the investors in a $31 million VC round that was announced in September 2005. www.nemerix.com <http://www.nemerix.com>
Newport Media Inc. (Lake Forest, Calif.) is fabless semiconductor company that sells chips for digital audio and mobile television standards. Founded in January 2005 the company launched a highly integrated multi-standard mobile TV receiver in June 2007. www.newportmediainc.com <http://www.newportmediainc.com>
P.A.Semi Inc. (Santa Clara, Calif.) is a fabless semiconductor company developing a power-efficient multiprocessor architecture based on Power processor cores licensed from IBM Corp. The resulting modular architecture is aimed at both the embedded and high performance computing markets. The company, founded in 2003, is led by processor design luminary Dan Dobberpuhl. www.pasemi.com <http://www.pasemi.com>
Perpetuum Ltd. (Southampton, England) was founded in 2004 as a spinoff from the University of Southampton. The company develops electricity microgenerators that can harvest enough energy from vibrations in plant and equipment to power sensor nodes and transmit data from them wirelessly. www.perpetuum.co.uk <http://www.perpetuum.co.uk>
Phiar Corp. (Boulder Colo.), founded in 2001, is developing metal-insulator electronics where quantum tunneling across an insulator-insulator junction is the transport mechanism. The technology is capable of terahertz frequencies. www.phiar.com <http://www.phiar.com>
Polymer Vision Ltd. (Eindhoven, Netherlands) received 21 million euro (about $27.5 million) from Technology Capital SA of Luxemburg in January 2007 to help it launch a roll-up display technology and taking the company out of ownership of Royal Philips Electronics NV. www.polymervision.com <http://www.polymervision.com>
Prime Sense Inc. (Tel-Aviv, Israel) was founded in late 2005 as a fabless semiconductor company. It is developing a combination image sensor and image processor that it claims would give digital devices the ability to see and comprehend the world in 3D. Applications are seen in video games and communications. www.primesense.com <http://www.primesense.com>
Raza Microelectronics Inc. (Cupertino, Calif.) was formed in 2002 by Atiq Raza, an executive who previously worked at Advanced Micro Devices Inc. and NexGen Microsystems Inc. The company is producing processors for network processing. www.razamicroelectronics.com <http://www.razamicroelectronics.com>
RedMere Technology Ltd. (Dublin, Ireland), is offering chips for high-definition multimedia interface (HDMI) connectors which can support multigigabit per second wire-line communications. The company has raised about $19 million since its founding in 2004 and it has its first chips out. www.redmere.com <http://www.redmere.com>
ReVolt Technology AS (Staefa, Switzerland) was formed as a spinoff from Norwegian contract research institute Sintef in 2004. The company has developed a rechargeable zinc-air battery technology, which it claims could replace lithium-ion batteries currently used in portable applications. The company relocated to Switzerland in October 2006 and appointed Dieter Woschitz as chief executive officer in August 2007.www.revolttechnology.com <http://www.revolttechnology.no>
EE Times 60 emerging startups list version 7.0
SemIndia Inc. (Santa Clara, Calif.) is a company formed by expatriate Indians in California with a mission of making India a global hub for semiconductor manufacturing. The company is working with the Indian government, state governments, and other strategic partners and customers to create a wafer fab in India. www.semindia.in <http://www.semindia.in>
Sequans Communications SA (Paris, France), founded in 2003, has become a supplier of silicon and embedded software for WiMax-based wireless LAN systems. www.sequans.com <http://www.sequans.com>
Siano Mobile Silicon Ltd. (Netanya, Israel), founded in June 2004, develops digital television receivers tailored specifically for mobile communications and entertainment devices. www.siano-ms.com <http://www.siano-ms.com>
SiBeam Inc. (Sunnyvale, Calif.) was founded in December 2004 by a team from the Berkeley Wireless Research Center (BWRC) together with several wireless and high-speed communications industry veterans. The company claims to be the first to build 60-GHz chipsets using CMOS technology. www.sibeam.com <http://www.sibeam.com>
SiDense Corp. (Ottawa, Ontario), founded in 2004, is a developer of embedded nonvolatile memory intellectual property. End-market products include home entertainment consumer products, cellular telephones, RFID, medical, automotive and other uses. www.sidense.com <http://www.sidense.com>
Silicon Hive (Eindhoven, The Netherlands), provides parallel processing technology for consumer electronics and mobile phone markets. The company licenses embedded parallel processor architectures, compilers and programming tools to chip makers. It was spun out from Philips Research in 2007. www.siliconhive.com <http://www.siliconhive.com>
Silistix Ltd. (Manchester, England), founded in December 2003 as a spinoff from the Amulet asynchronous logic research group at the University of Manchester in England, has received backing from Intel Capital. www.silistix.com <http://www.silistix.com>
Solido Design Automation Inc. (San Ramon, Calif.) was founded in 2005 with a mission to address process-variation for transistor-level designers. Solido has developed a proprietary and patent-pending set of algorithms forming the core of its technology. www.soliodesign.com <http://www.solidodesign.com>
T3G Technology Co. Ltd. (Beijing, China) is a fabless chip company developing chipsets for the TD-SCDMA 3G mobile communications standard. The company is backed by Royal Philips Electronics, Datang Mobile, Motorola and Samsung Electronics Co. Ltd. www.t3gt.com <http://www.t3gt.com>
Takumi Technology Corp. (Santa Clara, Calif.), founded in October 2003, is a supplier of critical dimension aware software solutions for backend tapeout defect analysis and layout optimization. www.takumi-tech.com <http://www.takumi-tech.com>
Tilera Corp. (San Jose, Calif.), a developer of programmable ASICs and associated compilers, was founded by Anant Agarwal, professor of engineering and computer science at the Massachusetts Institute of Technology. Agarwal serves as chief technology officer www.tilera.com <http://www.tilera.com>
Unity Semiconductor Corp. (Sunnyvale, Calif.) was founded in 2002 to exploit technology based on a change of resistance that can be produced in certain conductive metal oxides and giving rise to the possibility of non-volatile resistive RAM (RRAM) www.unitysemi.com <http://www.unitysemi.com>
Varioptic SA (Lyon, France), founded in 2002, has developed a range of electrically-controlled liquid lenses for use in cameras. The company has concluded a licensing agreement with STMicroelectronics NV. www.varioptic.com <http://www.varioptic.com>
VeriSilicon Holdings Co. Ltd. (Shanghai, China), founded in 2001, is a fabless ASIC design foundry focusing on providing semiconductor IP, design services and turnkey services including manufacturing, packaging, testing, and delivery. www.verisilicon.com <http://www.verisilicon.com>
WiQuest Communications Inc. (Allen, Texas), founded in 2003, is a fabless company developing chips for the ultrawideband (UWB) market. www.wiquest.com <http://www.wiquest.com>
XMOS Semiconductor Ltd. (Bristol, England) is a fabless semiconductor company founded by academic computer scientist David May, in June 2005. The company is developing software-programmable multicore processor arrays to implement semiconductor devices for consumer applications. www.xmos.com <http://www.xmos.com>
Xoomsys Inc. (Cupertino, Calif.), formed in 2004, is developing scalable, distributed processing software for large-scale circuit simulation using both industry-standard circuit simulators and inexpensive Linux computing clusters. www.xoomsys.com <http://www.xoomsys.com>
The announcement of version 6.1 of the Silicon 60, in September 2007, could be found here <http://www.eetimes.eu/201803916> when this story was first posted. Version 6.0 of the list, first published in June 2007, could be found here here <http://www.eetimes.eu/200001293> .
Version 5.1 of the list, from June 2006 could be found here <http://www.eetimes.eu/189400556> . Version 4.0 from November 2005, could be found here <http://www.eetimes.eu/173401577> when this story was first posted. Version 3.0 of the list, from April 2005, could be found here <http://www.eetimes.eu/162100048> . Version 2.0 of the list, published in October 2004, could be found here <http://www.eetimes.eu/49400011> and version 1.0 of the list, published April 2004, could be found here <http://www.eetimes.eu/18900273> when this article was first posted.
2008년 6월 4일 수요일
EE Times updates list of emerging startups
2008년 5월 29일 목요일
2008년 5월 28일 수요일
Tips on using CPLDs to reduce system processor power consumption | Programmable Logic DesignLine
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Designers use several design techniques to significantly reduce overall system power consumption, such as:
* Reducing operating voltage;
* Optimizing system and CPU clock frequency;
* Eliminating spikes of large current consumption during the power up sequence;
* Efficiently managing system battery operation;
* Efficiently managing operating mode of system devices;
* Minimizing bus activity;
* Reducing bus capacitance;
* Reducing switching noise.
Many manufacturers today offer devices with power saving modes that temporarily suspend the device from its normal operation. These devices have the option to power down or transition to a non-functioning state if the device is not active for a specific amount of time.
This feature is available on many of today's microprocessors and MCUs. By taking advantage and managing the operating mode of large power consumers on a PCB, such as the processor, the overall power consumption of the system can be reduced significantly.
Reducing power consumption involves correct management of the operating mode of a device and designing a system to take advantage of the modes a device can operate within.
Offloading operations of the microprocessor allows it to stay in its low-power state for a longer amount of time. One way to reduce system power is to allow a low-power PLD, such as a CPLD, to manage these offloaded operations.
This article describes this possibility, along with types of operations that allow a processor to remain in a low-power state longer, thereby reducing system power consumption.
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| Figure 1: Shown is the typical power consumption of system components in a Web Pad application. |
Microprocessor modes
In some portable applications, the CPU can consume 30 percent of the overall system power. Figure 1 above illustrates the typical power consumption of system components in a Web Pad application.
Microprocessor power consumption can range from 720µW to 1W during normal operation. Microprocessor operating modes vary by part and manufacturer and include modes such as normal; run, sleep, suspend, standby, stop and idle operation.
Operating modes can vary in power consumption as much as 230mW between states. Normal operation of some low-power microprocessors can be as little as 250mW.
Figure 2 below illustrates the power consumption of the Intel StrongARM SA-1110 microprocessor operating modes. The power dissipation numbers shown in Figure 2 are determined by operating at 206MHz with a nominal external voltage supply of 3.3V and internal voltage supply of 1.8V.
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| Figure 2: Shown is the difference in power consumption of operating modes in a microprocessor. |
Operating modes of the StrongARM processor include normal, idle and sleep. In normal operation, the CPU is full-on, with the device fully powered and receiving active clocks.
In idle mode, even though power is applied to the CPU and other components, all clocks to the CPU are stopped, with only clocks to peripheral devices active. In sleep mode, power to the CPU and other peripheral components is disabled. Sleep mode disables all functions except the real-time clock, interrupt controller, power manager and general purpose I/O.
Microprocessors with power saving modes have an on-board power management controller. Operating modes allow the OS or software application to temporarily suspend the CPU. The microprocessor executes a series of instructions to place itself into a power saving state. Once in a power down mode, several components of the microprocessor can still respond to system interrupts.
Idle and sleep modes
For example, the idle mode of the StrongARM SA-1110 processor saves significant power, but certain modules remain powered, such as the LCD, memory and I/O controllers. Even though the clock to the CPU is stopped, peripheral modules are still active.
The idle mode can still consume a significant amount of power, on the order of 100mW. By placing the processor into the sleep mode, only active modules are powered to respond to interrupts and wake up signal requests.
Sleep mode consumes even less power than idle mode; current consumption can be less than 100mA. For a microprocessor to return to normal operation from a power down mode, an event must occur.
The following events can wake up the processor, but vary based on manufacturer, part, and current operating mode:
* Hardware reset;
* System interrupt;
* GPIO interrupt;
* Real-time clock interrupt; * OS timer interrupt;
* Peripheral interrupt;
* External wake-up signal.
Upon recognition of an enabled wakeup event, the microprocessor will begin a series of steps to wake up from a power down state. Figure 3 below illustrates the general flow for a processor waking up from a power down mode.
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| Figure 3: Shown is the general flow for a processor waking up from a power down mode |
CPLD design
Operating modes are using when the microprocessor is idle for a specific amount of time. When a microprocessor receives an enabled interrupt, the processor will respond to the interrupt request.
When the processor is responding to the interrupt, it will operate in its run or normal mode. Reducing the number of interrupts to the processor will increase the time the processor is in a power saving state. Ideally, if the microprocessor does not have any instructions to execute, it will remain in a power saving mode forever.
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| Figure 4: Using an external data acquisition device to offload interrupt requests required of the microprocessor will reduce overall system power. |
Inserting an external device to respond and handle system interrupts can reduce the operations required of the processor. By allowing the microprocessor to stay in its power down mode as long as possible, significant power savings can be realized.
Using a low-power PLD to supplement the microprocessor will save system power and increase system battery life. The industry's latest CPLD offerings simultaneously deliver high performance and low power consumption.
Standby current of a typical low-power CPLD is less than 100µA. Figure 4 above illustrates using a reprogrammable CPLD to interface to incoming system interrupts. Using an external data acquisition device to offload interrupt requests required of the microprocessor will reduce overall system power.
System interrupts
Depending on the end application for the processor, a variety of external devices may interrupt the processor. These interrupts include both data acquisition and data processing requests.
By separating data processing interrupts to the microprocessor, data acquisition interrupts can now be serviced by the external CPLD. Utilizing a CPLD to handle data acquisition interrupts will offload interrupt requests to the microprocessor and save power.
Categorization of the type of data acquisition interrupts to the CPLD will depend on the end application. Peripheral devices or incoming data demanding a response to incoming data can be classified as data acquisition interrupt requests. Data acquisition interrupts include:
* Memory access interrupts;
* Communication interfaces such as I2C, UART, SPI or ISA;
* GPIO interrupts;
* LCD interface interrupts.
This is not a complete list of interrupts that can be processed by the CPLD, but provides a starting point for the system design.
Operational flow
Figure 5 below illustrates the main operational flow for the design of a CPLD. Once a valid external interrupt is recognized by the CPLD, it will determine if it contains the functionality to process the interrupt.
Once the CPLD has processed the interrupt, it can assert an interrupt to the processor for any data processing requests needed. If the CPLD is unable to process the interrupt, the interrupt is passed to the processor. The CPLD also monitors the operating state of the processor.
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| Figure 5: Shown is the main operational flow for the design of a CPLD |
Functionality
The low-power CPLD design consists of an interrupt interface and controller to handle interrupt requests, the functionality to process the interrupt, and a processor interface. The main functions of the CPLD are as follows:
Interrupt interface. The interrupt interface of the CPLD receives all external device interrupt requests previously recognized by the microprocessor. The interrupt interface determines if the CPLD is capable of processing the interrupt request. The CPLD handles data acquisition interrupts that request data receiving and storage capabilities.
If the CPLD is unable to process the interrupt, the interrupt is passed to the microprocessor. The CPLD interrupt interface provides the masking capability for all interrupt sources and the ability to determine the interrupt source.
Programmable logic provides flexibility to change the trigger mode, which includes a high or low level and falling or rising edge sensitivity. The CPLD interrupt control registers are similar to the registers in the microprocessor.
Interrupt controller. The CPLD interrupt controller emulates the functionality that exists in the system microprocessor. The interrupt controller interprets from which device the data acquisition interrupt was received and initiates the processing of the interrupt.
The CPLD processes the data acquisition interrupt request that would have otherwise interrupted the microprocessor. The interrupt controller initiates the action to process the request. An example of this is an application where the CPLD is receiving data from a remote device.
The device is requesting to write the data being sent into memory. The CPLD interrupt controller recognizes a valid interrupt and initiates the memory interface to interpret the data. Peripheral device interfaces—The CPLD provides the interface to system devices that are needed in processing interrupt requests. Device interfaces that are needed are dependent on the end application.
When an external device interrupts the CPLD to read or write data into a memory component, that particular memory interface is needed in the CPLD design. The types of interfaces needed can range from memories to LCD interfaces to communication interfaces such as PCI, UART, SPI and ISA.
Microprocessor interrupt interface. The CPLD, like any external device requesting services of the processor, has the capability to interrupt the microprocessor.
The CPLD must be able to interrupt the microprocessor once a data acquisition operation is complete. The designer has the option to set the priority level of interrupt requests from the CPLD and whether or not interrupts received from the CPLD will wake the processor from a power down state.
Microprocessor operating mode interface. Depending on the system microprocessor, the CPLD will be able to recognize the operation state of the processor. Some microprocessors provide external pins that represent the current operating mode.
Depending on the CPLD and microprocessor design, the CPLD could recognize the current operating state of the processor and determine whether to assert an interrupt to the processor to execute a waiting interrupt.
For example, if a low priority interrupt is received by the CPLD and the processor does not need to transition from its low-power state, the CPLD can create a register indicating pending interrupts. Then when the processor wakes, the interrupt pending register can be read by the microprocessor.
Benefits
Figure 6 below illustrates the power savings that may be realized in a typical battery operated device using a leading-edge, low-power CPLD (left) vs. a standalone microprocessor design. The power requirements of the CPLD are minimal compared with the power savings realized by keeping the microprocessor in its low-power modes for a longer amount of time.
Standby current of a typical low-power CPLD is on the order of 100µA. The operating power consumption depends on the application and clock frequency.
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| Figure 6: Shown is the power savings that may be realized in a typical battery operated device using a leading-edge, low-power CPLD (left) vs. a standalone microprocessor design (right). |
For a 64-macrocell CPLD fully populated with 16bit counters and a 50MHz clock, ICC is around 10mA. Note that the actual power savings realized will depend on the system design, including the type of microprocessor and the CPLD design.
Along with power savings attained using a CPLD, interrupt response time is reduced. The peripheral device no longer has to wait the delay time for the microprocessor to wake from a power saving state.
Additional design savings that can be realized include:
* Reducing the number of interruptions to the processor;
* Reducing the number of processor wake-up cycles over a length of time;
* Reduction of clock frequency without impact on throughput;
* Running the processor at a lower frequency for data processing operations;
* Running the CPLD at a higher frequency for data acquisition operations.
Designing a power-sensitive application involves not only using software for power management, but utilization of hardware design techniques. Designing a low-power CPLD to keep a microprocessor in a low-power operating state longer can significantly reduce system power consumption.
Mark Ng is an Applications Engineer at Xilinx Inc.
2008년 5월 27일 화요일
Emailing: 와이브로 장비 업계, ‘모처럼 활짝’
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| 와이브로 장비 업계, '모처럼 활짝' |
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| [ 2008-05-22 ] |
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| SK텔레콤이 와이브로 웨이브2 사용기술 개발과 본격적인 사업 추진 계획을 밝힘에 따라 그간 조바심을 태워온 와이브로 관련 장비업체들의 얼굴에 화색이 돌고 있다. 삼성전자나 포스데이타 등 주요 와이브로 장비 업체들은 국내 시장보다 해외시장 개척에 더욱 주력하는 모습을 보여 왔지만 SK텔레콤의 본격 사업 추진 선언에 따라 국내 시장에서도 상당한 수익을 기대할 수 있게 됐다. 현재 KT와 SK텔레콤이 발주할 물량만도 4000억원 수준이다. 이번 SK텔레콤 와이브로 웨이브2 서비스에는 삼성전자가 전량 장비를 공급하게 됐다. 삼성전자는 지난해 하반기 기존보다 전송속도를 2배 이상 높인 와이브로웨이브2 장비를 세계 최초로 개발, 이번에 SK텔레콤에 납품하게 됨으로써 국내는 물론 해외 진출에도 더욱 탄력을 받을 것으로 기대하고 있다. 삼성전자 관계자는 "이번 SK텔레콤 와이브로 웨이브 2 서비스 장비 공급을 차질없이 진행하며 이와 함께 기존에 진행중이었던 미국, 일본, 중동, 중남미 등에서 와이브로 사업을 더욱 확대할 것"이라며 "연내 유럽과 동남아 시장에도 진출해 전 세계로 사업영역을 확대, 와이브로를 세계의 통신기술로 부각시키기 위해 노력할 것"이라고 밝혔다. 와이브로 토털 솔루션 공급에 삼성전자와 양대산맥을 이루고 있는 포스데이타도 MIMO(Multi Input Multi Output) 기능을 추가하고 전송용량을 2배 이상 늘리는 등 기존 와이브로 웨이브 1 장비를 와이브로 웨이브 2 장비로의 업그레이드 막바지 작업을 곧 끝내고 출시할 계획이다. 포스데이타는 지난 4월 모바일 와이맥스 제품에 국제 공인인증을 획득하는 한편 지난해부터 미국, 일본, 동남아시아 등지의 통신사업자들과 상용장비 공급을 위해 현지에서 기술 검증을 위한 필드테스트를 추진하는 등 해외에서 적극적인 마케팅 활동을 펼쳐왔다. 포스데이타는 해외 와이브로 시장 개척에 더욱 힘을 쏟는 동시에 국내 와이브로 웨이브2 서비스 시장에도 적극적으로 대응한다는 전략이다. 이외에도 와이브로 중계기 등을 생산하는 서화정보통신, 기산텔레콤, 솔리테크 등도 와이브로 웨이브 2 장비 개발 및 판매를 더욱 확대한다는 방침이라 당분간 와이브로 웨이브 2를 둘러싼 장비 업체들의 경쟁은 보다 가속화될 전망이다. 전자신문인터넷 장윤정 기자 linda@etnews.co.kr |
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| Copyrightⓒ 2000-2005 ELECTRONIC TIMES INTERNET CO., LTD. All Rights Reserved. |
Emailing: KTF, 초소형 기지국 도입한다
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| KTF, 초소형 기지국 도입한다 |
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| [ 2008-05-26 ] |
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| KTF가 차세대 유무선 통신 통합(FMC) 핵심 장비인 '펨토셀'을 도입한다. KTF는 25일 가정용 초소형 기지국인 '펨토셀(Femtocell)'을 도입하기 위해 장비업체들에게 정보제안요청서(RFI)를 발송, 장비 평가를 진행중이라고 밝혔다. SK텔레콤은 물론 KT 등도 도입을 검토했지만, 실제 도입 절차를 진행하기는 KTF가 처음이다. 삼성전자, LG-노텔, 화웨이, 노키아지멘스 등의 장비업체가 KTF RFI를 받은 것으로 확인됐다. 이중 화웨이는 이미 장비 시험을 끝냈고, LG-노텔의 장비에 대한 시험을 진행중이다. 다른 업체들도 6월말까지 평가를 마무리할 예정이다. 가정용 초소형 기지국인 펨토셀은 당초 이동통신 커버리지를 확대하기 위해 개발했으나, 최근에는 유무선 통신 통합의 핵심 장비로 더 관심을 받는 장비다. 가정 내에 들어와 있는 브로드밴드망을 통해 이동통신 네트워크에 접속할 수 있다는 특성 때문이다. 이동통신과 인터넷서비스가 동일 접점에서 이뤄지는 것이다. KT와 KTF 합병이 조금씩 가시화하는 상황에서 펨토셀 도입이 유무선 통신 사업의 화학적 결합을 위한 가장 기초적인 인프라 구축이라는 점도 주목거리다. 장비 업체 관계자는 "RFI가 아직 많이 다듬어지지 않은 수준"이라며 "KTF 측에서는 일단 장비를 시험하면서 향후 사업 계획을 구체화하려는 것으로 보인다"고 밝혔다. KTF 측은 "아직 대규모 장비 도입을 위한 단계는 아니다"라며 "관련 업체를 대상으로 기술 수준을 점검하고, 산간지역의 3세대 이동통신(WCDMA) 커버리지를 확대하는 정도에서 도입을 추진하고 있다"고 밝혔다. 홍기범기자kbhong@ |
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| Copyrightⓒ 2000-2005 ELECTRONIC TIMES INTERNET CO., LTD. All Rights Reserved. |
2008년 5월 22일 목요일
Emailing: 알테라, 40nm FPGA와 HardCopy ASIC 최초 발표
 | 신제품 |
| 인쇄: 파일을 선택한 후 브라우저 메뉴에서 인쇄하십시오. 알테라, 40nm FPGA와 HardCopy ASIC 최초 발표
알테라는 업계 최초로 40nm 공정기술이 적용된 FPGA와 HardCopy� ASIC을 발표했다.
각각 트랜시버가 탑재될 수 있는 40nm Stratix� IV FPGA와 HardCopy IV ASIC은 업계 최고의 로직 사이즈 크기, 성능 및 저전력을 제공한다.
Stratix IV 제품군은 Stratix III제품군보다 2배 더 많은 최대 680,000개의 로직 엘리먼트(LE)를 지원하는 가장 대용량의 FPGA 제품이다.
TSMC의 40nm 공정으로 제조되는 Stratix IV FPGA 제품군은 더욱 강화된 메모리와 DSP 자원을 보유한 Stratix IV E FPGA와 여기에 트랜시버까지 탑재된 Stratix IV GX FPGA의 두 가지 종류로 이루어진다.
Stratix IV GX FPGA는 최대 8.5Gbps에서 작동하는 최대 48개의 트랜시버를 제공함으로써 다른 어떤 FPGA의 대역폭보다 2배 넓은 업계 최대의 대역폭을 설계 디자이너들에게 제공한다. 또한 Stratix IV GX FPGA는 PCI Express 의 1, 2세대를 위한 하드 코어 IP지원을 하며, Serial RapidIO�, XAUI (DDR XAUI포함), CPRI (6G CPRI포함), CEI 6G, 인터라켄 및 이더넷을 포함하는 다양한 프로토콜들을 지원한다.
Stratix IV를 구성하는 제품들은 알테라의 특허 기술인 프로그래머블 전력 기술을 사용하여, 성능을 최대화하고 그 외의 부분에는 최저 전력을 사용하도록 로직, DSP 및 메모리 블록들을 최적화한다.
한편, HardCopy IV ASIC 제품군은 Stratix IV와 동등한 로직 사이즈 크기를 제공하며 최대 1,330만 개의 게이트를 보유하고 있다.
알테라의 이들 40nm 디바이스들은 유무선통신, 군사, 방송 및 ASIC프로토타입과 같은 많은 시장의 다양한 고성능 어플리케이션의 요구사항을 만족시킨다.
이와 더불어 알테라는 더욱 향상된 Quartus� II 디자인 소프트웨어와 40nm 제품에 최적화된 IP솔루션을 발표했다. Quartus II소프트웨어 버전 8.0은 디자이너들이 효율적으로 팀 디자인을 진행하도록 도와주며, 업계 최고의 성능, 로직 효율 및 최단 컴파일 시간을 통해 시장진입 시간을 앞당길 수 있도록 만든다.
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2008년 5월 8일 목요일
[CSR] 삼성전기와 절반 가격의 GPS 모듈 개발
2008년 4월 29일 화요일
SiliconBlue 65-nm FPGAs run on microamps - Programmable Logic DesignLine
The company was founded by Kapil Shankar, CEO, a 20-year veteran of the programmable logic industry, and Antti Kokkinen, a partner and cofounder of venture capital firm BlueRun Ventures (Menlo Park, Calif.).
2008년 4월 23일 수요일
2008년 4월 22일 화요일
2008년 4월 18일 금요일
사진 한 장 속에 우주의 신비 가득... 시선 집중
[팝뉴스] 2008년 04월 16일(수) 오후 01:21
미항공우주국 홈페이지에 15일 소개된 사진이다.
촬영자는 지난 주 스웨덴의 밤하늘을 촬영했다. 단 한 장의 사진 속에 우주의 경이가 가득하다.
사진 근경에는 나무들이 그리고 멀리 눈 덮인 산들이 있다. 지평선에는 구름의 실루엣이 드리워져 있다. 그런데 주의 깊게 보면 부근에 초록색 오로라와 붉은 오로라가 보인다.
IC 1396, 하트 성운, 소울 성운 등을 포함한 적색 방출 성운들이 하늘에 점점이 박혀 있다.
그리고 왼쪽 위에서 오른쪽 아래 대각선 방향으로, 우리 은하가 펼쳐져 있다. 마지막으로 지평선 왼쪽 위 안드로메다 은하가 빛을 발하고 있다.
김정 기자
- Copyrights ⓒ 팝뉴스(PopNews), 무단 전재 및 재배포 금지 -> 라는데 여기다 이렇게 올려두 괜찮을라나...?
2008년 4월 8일 화요일
Thunder and Lighting above Bangkok
Bangkok, known in Thai as Krung Thep (กรุงเทพฯ) is the capital of and largest city in Thailand located on the east bank of the Chao Phraya River, near the Gulf of Thailand.
Bangkok is the 22nd most populous city in the world. Although Bangkok now has roughly 7 million registered inhabitants, the actual population is much higher, and including commuters from the surrounding areas, may reach an estimated 15 million people during the day time, making the city one of the most densely populated in the world. Recently, the value of Bangkok's economic output has matched that of Singapore, making Bangkok a major economic and financial center in Southeast Asia. Bangkok has one of the fastest rates in the world for construction of high rise buildings. The city's wealth of cultural sites makes it one of the world's most popular tourist destinations.
This photo taken during a taxi ride on the highway of Bangkok. A typfoon was just above Bangkok. Photo taken from a taxi window. SM:)E
2008년 4월 3일 목요일
IBIS Model
* IBIS (I/O Buffer Information Specification)
* ANSI/EIA-656-A IBIS Home Page (http://www.eigroup.org/IBIS/)
====================
High Speed Digital PCB Simulation을 수행함에 있어서 부품의 IBIS Model Importing은 필수 조건이다. PCB 패턴은 결국 부품의 Pin과 관련한 특성을 나타내기 때문이다. 그러기에 고속신호의 PCB는 해석의 신뢰성을 확보하기 위해서 IBIS Model의 확보가 무엇보다 중요하다고 할 수 있다.
1990년 초, 인텔사에서 PCI 버스에 대한 엄격한 요구사항을 내 놓기 시작하여 그 특이한 형식이 대두되었다. 그 이후 반도체 제조회사, EDA 및 컴퓨터 제조관련회사 등 약 35개의 회원사를 구성하여 공개적인 표준규격을 정하였다. 이것이 IBIS Model이다.
이 모델을 만드는 방법은 Spice 시뮬레이션과 측정(TDR(Time Domain Reflectometry)을 이용한 측정, 궤선 추적기(Curve Tracer)를 이용한 측정방법), 다른 모델형식으로부터의 변환 등이 있으며, 몇몇 CAE 벤더들은 IBIS 모델이나 다른 시뮬레이터 형식으로부터 다시 변환할 수 있는 비공개 Tool들을 제공한다.
이 IBIS 모델의 특징은 다음과 같다.
- 집적회로의 I/O 버퍼 특성을 I/V관계로 나타낸다.
- 제조상의 회로정보가 요구되지 않으므로, 제작사의 도움 없이 모델 구현이 가능하다.
- 회로에 대한 정보를 숨길 수 있어, 제작사에서 IBIS Model를 공개/보급이 가능하다.
- Spice Model과는 달리 상용 EDA 도구와 호환성을 가진다.
- IBIS Model 제공하는 Web Site
- http://www.eigroup.org/ibis/ibis.htm
- http://www.mentor.com/icx/modeling/ibis_modeling.html
- http://www.vhdl.org/fmf/wwwpages/IBIS_models.html
- 제조회사의 홈페이지
====================
IBIS(I/O Buffer Interface Specification) 모델이란 회로 설계를 위한 칩의 기본적인 I/O 정보를 담고 있는 것을 말합니다. 인텔에서 처음 만들었구요. 현재는 널리 퍼져서 많이 쓰이고 있습니다. IBIS모델은 칩 내부에서 볼때 CORE에서 PIN-LEG 중간에 있는 BUFFER들을 기준으로 칩을 모델링한 것입니다. 따라서 칩 내부의 정보는 회로설계자들이 알 수 없으므로 칩 제조사의 노하우나 기술들은 비밀이 보장되는 장점이 있구요. 시뮬레이션 시간도 SPICE모델에 비해 몇배 빠릅니다. SPICE모델은 정보가 방대하다는 장점도 있겠지만 처리를 위해 IBIS모델보다 몇배의 시간을 시뮬레이션을 투자하기에 효율이 떨어지는 단점이 있기 때문에 요새는 IBIS 모델을 많이 쓰는 편입니다.
IBIS모델은 칩 제조사에서 제공하고 있습니다.
2008년 3월 30일 일요일
2008년 3월 26일 수요일
Delta-sigma ADCs in a nutshell
By Bonnie Baker
- Delta-sigma ADCs in a nutshell - 12/14/2007 - EDN
: Part one of a three-part series exploring the basic topology and functions of delta-sigma ADCs. - Delta-sigma ADCs in a nutshell, part 2: the modulator - 1/17/2008 - EDN
: Unlike most quantizers, the delta-sigma modulator includes an integrator that shapes the quantization noise. - Delta-sigma ADCs in a nutshell, part 3: the digital/decimator filter - 2/21/2008 - EDN
: A digital-filter function attenuates the noise, and the decimator function slows the output data rate. - Delta-sigma ADCs in a nutshell, part 4: noise versus data rate - 3/20/2008 - EDN
: "Effective resolution" describes the useful bits from an analog-to-digital conversion as they relate to signal noise.
HDMI 설계 가이드: HDTV 수신기 어플리케이션 내에서의 성공적인 고속 PCB 설계
게재 : 2008년 03월 26일
이 기사는 PCB 설계를 통해 기기 전체 성능을 최대화하려는 HDMI 먹스 리피터 사용자들을 위한 설계 가이드라인이다. 설계 관련 권고사항과 더불어, 고속 PCB 설계의 몇 가지 주요 개념들에 대해 알아보자.
더 자세한 기사는 PDF 버전으로 제공.
2008년 3월 20일 목요일
2008년 3월 13일 목요일
Si2 releases open source 45 nm cell library
Wednesday, March, 12th 2008
News Analysis
Si2 releases open source 45 nm cell library
By Richard Goering
02/29/08
Aiming to facilitate R&D in academia and industry, as well as boost its own standards efforts, the Silicon Integration Initiative (Si2) has released an open-source 45 nm standard cell library. The Open Cell Library was created and donated by Nangate, a provider of automated tools for cell library development.
The Nangate Open Cell Library is available on line for anyone who wants to download it, subject to two restrictions: it cannot be used for benchmarking EDA tools, and it cannot be used in a benchmark against other cell libraries. The library is based on the FreePDK45 process design kit (PDK) project from North Carolina State University (NCSU).
"There are multiple ways this library can facilitate research and development in this industry," said Sumit DasGupta, senior vice president of engineering at Si2. The original requests for an open-source standard cell library came from academia, he said, where researchers want a library for algorithm development that's "unencumbered" by proprietary foundry design rules. "There is a very critical need and there was nothing in the public domain that could address the need," DasGupta said.
The Open Cell Library can be useful for standards efforts as well. Si2's Open Modeling Coalition (OMC) will use the library in a reference flow for library characterization, modeling, and model usage. Nangate will work with OMC to maintain and define future standards for library flow interfaces.
Jesper Knudsen, vice president of marketing at Nangate, commented that academic researchers can use the library to develop synthesis and timing algorithms. The library is "pretty complete today," he said, and with over 105 different cells, has enough content to support extensive research in synthesis, placement and routing. But it doesn't have everything. The current version supports only nonlinear delay modeling, and does not support the Effective Current Source Model (ECSM), a capability that Nangate and Si2 hope to add.
In its first release, the Open Cell Library contains 38 different functions ranging from buffers to scan flip-flops with set and reset. All the different cell functions come in multiple drive strength variants, resulting in more than 100 different cells in the library.
Knudsen said EDA companies can use the cell library to run demonstrations of their software, saving the need to invent their own libraries. "A chip design company could use it to investigate how their current design will migrate down to 45 nm," he said. "We have fairly conservative rules for 45 nm, so it's probably not very far from what would come from a foundry."
But the library cannot be used for a commercial chip design that will be taped out, he said. "It won't match the design rules that come from the foundry. It will fail the design rule and DFM checks," Knudsen said.
DasGupta noted that companies can use the library to evaluate new tool capabilities without having to expose their own proprietary libraries. They can also check out new design flows before their own 45 nm libraries are available.
Nangate developed the library, Knudsen said, after joining the OMC and discovering that the coalition needed a library for its development work. Nangate used its Library Creator tool to generate the library. The Predictive Technology Model (PTM) from Arizona State University was used to characterize the library.
"We don't want people to benchmark this library against any other, and we don't want commercial tool benchmarks, but other than that there are no restrictions," DasGupta said. "We want to propagate this as far and wide as possible."
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'OpenEngines' initiative drives EDA plug-and-play
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2008년 3월 12일 수요일
김동률 5집 - Monologue
여백속에서 김동률의 음악적 공감을 만나다
김동률의 5집 음반 ‘Monologue’는 음반 제목에서 느낄 수 있듯 예상외로 매우 소박하다. 김동률은 이번 음반에서 음악적인 욕심을 채우기보다는 ‘좋은 대중가요’를 만들고 싶었다고 한다.
김동률 음악에서의 전매특허인 현악을 곁들인 어쿠스틱한 편곡과 서정적인 멜로디는 변함이 없으나, 장중함과 비통함이 느껴지던 전작들에 비해서는 전체적인 느낌이 훨씬 편안하고 소탈하게 들린다.
앨범 작업하는 동안 주위사람들에게 음악의 느낌이 많이 달라졌다는 얘기를 자주 들었다고 한다. 이는 특별히 변화를 위한 의도적인 방향 선회였다기 보다는 1년 반 동안의 라디오 DJ 활동과 TV 프로그램의 진행을 통해 새로운 음악을 많이 접하게 되면서 자연스럽게 형성된 새로운 음악적 취향이 이번 앨범 색깔의 변화에 결정적 영향을 끼친 것으로 짐작된다.
김동률의 전매특허인 오케스트라도 앨범 전면에 나서지 않고 적재 적소에 적당한 만큼 사용되었으며 미니멀한 악기구성으로 여백의 미를 살린 편곡의 곡들이 쉽게 눈에 띄는 것도 그를 뒷받침한다.
2008년 빼어나도록 튼튼한 음악적 이음새로 1월의 문을 연 ‘김동률 컴백’이 이미 가요계의 화두로 떠오른 것은 그의 ‘음악적 역량’과 새 음반에 거는 ‘기대’를 가늠케 한다.
수록곡
- 출발
- 그건 말야
- 오래된 노래
- Jump
- 아이처럼
- The Concert
- Nobody
- 뒷모습
- 다시 시작해보자
- Melody
2008년 3월 3일 월요일
2008년 3월 1일 토요일
USB battery-charger designs meet new industry standards
By Takashi Kanamori and George Paparrizos, Summit Microelectronics -- EDN, 2/21/2008
- 출처: http://www.edn.com/article/CA6531593.html?industryid=47043&nid=2436&rid=228590015&
2008년 2월 29일 금요일
2008년 2월 25일 월요일
Emailing: 휴대폰 속으로 성큼 들어선 GPS 기능 구현방법들
| 뉴스 및 동향 | |||
| 인쇄: 파일을 선택한 후 브라우저 메뉴에서 인쇄하십시오. 휴대폰 속으로 성큼 들어선 GPS 기능 구현방법들
존 왈코
개인용 내비게이션 기기(personal navigation device: PND)의 인기가 날로 치솟고 위치 기반 서비스가 휴대폰의 기능으로 편입되면서, 자신의 위치를 확인하는 일은 이제 식은 죽 먹기만큼이나 쉬워졌다. 또한 정신 없을 정도로 급변하는 시장의 움직임(지난해만해도 Nokia사는 전자지도 제공업체인 Navtaq사를 81억 달러에 인수했다)은 휴대폰을 통한 길 찾기 역시 보다 쉽게 만들고 있다. 그러나 GPS 기능을 갖춘 휴대폰을 디자인하는 설계자들에게는 그 길이 그리 명확치 않아 보인다. 최소의 비용을 들여 위치추적기술을 핸드셋으로 무리없이 편입시키는 것은 일반적으로 RF와 디지털 기능들을 동일한 기기로 통합하는 것을 의미한다고 여겨져 왔다. 이러한 구조적 접근법을 대표하는 지지업체는 Qualcomm사로, 이 업체는 지난 몇 년 동안 CMDA 핸드셋용 디지털 베이스밴드 칩에 GPS 프로세서들을 통합시켜 왔다. 하지만 대안적인 접근법도 있다. 블루투스나 Wi-Fi 기능에서 그랬던 것과 마찬가지로, 독립형(standalone) GPS 반도체 및 통합용 IP를 제공하는 것이다. 업계 동향 현재, 독립형 GPS 반도체 및 관련 소프트웨어의 최대 공급업체는 SiRF Technology사이다. SiRF사는 독립형 PND 시장에서 상당한 시장 점유율을 차지하고 있으며, 휴대폰에서 이 업체의 칩의 사용빈도는 증가하고 있다. SiRF사는 라이센싱이나 NXP, Freescale, 그리고 Intel사와 같은 칩 제조업체들과의 공동 제품개발 계약을 통해 자사의 선두적 입지를 굳히기 위해 노력하고 있다. SiRF사 이외에도 현재 신생업체 7개 업체가 SiRF를 따라잡기 위해 분투하고 있다. 신흥 시장의 잠재적 수요를 고려한다면 그리 놀라운 수치는 아니다. 이러한 신생업체의 면면을 살펴보면, 스위스 Nemerix사, Ceva사의 GPS 부문인 GloNav사, u-Blox사, u-Nav Microelectronics사, 그리고 약 일년 전 NordNav사와 Cambridge Positioning Systems사를 매입한 블루투스 칩의 개척업체, CSR사가 있다. NXP사는 GloNav사와 최소 8,500만 달러 인수 계약을 진행 중이며, Atheros사는 약 5,400만 달러로 u-Nav사의 매입을 추진하고 있다. Qualcomm사가 이 분야에 뛰어든 상황에서, 지난해 Broadcom사가 GPS 및 GPS 관련 기기, 그리고 관련 소프트웨어를 장기간 공급해오던 Global Locate사를 1억 5,000만 달러에 인수한 일은 어쩌면 당연한 결과인지도 모른다. 그렇다면 핸드셋 안의 GPS 싸움에서 승리를 거머쥘 접근법은 과연 무엇이 될 것인가? 합리적 선택은 무엇? "기술적 그리고 사업적 측면 모두에서 여러 가지 절충사안이 존재한다"고 SiRF사의 창립자이자 마케팅 VP인 Kanwar Chadha 씨는 말했다. "하지만 독립형 접근법은 설계자들에게 가장 큰 유연성을 제공하며, 나라별 그리고 셀룰러 기술별 차이가 큰 어태치 레이트(attach rates)에서 가장 합당하다." GPS의 어태치 레이트는 확인하기가 매우 까다롭기로 유명하다. 하지만 Chadha 씨는 미국에서 사용되는 CDMA 핸드셋에서는 100퍼센트에 근접하며, 한국 및 일본에서도 매우 높은 수치를 기록한다고 주장한다. 반면 유럽에서는 '낮은' 수치에 머물렀으며, 중국과 인도에서는 훨씬 나빴다고 그는 말했다. SiRF사의 독립형 구조 접근법은 네트워크 사업자로부터의 지원에 크게 주안점을 두지 않는다고 Chadha 씨는 말했다. "우리의 통합 접근법이 가장 유연하다. 따라서 이 싸움에서 승리할 것"고 그는 말했다. 당연히, Qualcomm사의 GPS용 제품 관리 디렉터인 Leslie Presutti 씨는 다른 견해를 갖고 있다. Presutti 씨는 "베이스밴드로 GPS 기능성을 통합하는 것은 지금까지 가장 비용 효율적인 솔루션이다. 그리고 OEM에게 최고의 유연성을 제공한다"고 말했다. "모든 대역과 플랫폼에서 기능성을 최적화하는 방법을 알고 있다. 이것은 또한 ODM이 시간 소비적이며 복잡한 통합 및 최적화를 거치지 않고서 GPS 기능을 추가하는 가장 빠른 방법이기도 한다." 향후 발전 가능성 시장조사업체인 iSuppli사는 미국에서 휴대폰의 GPS 시장이 가파른 성장세를 보일 것이라고 전망했다. 이는 주로 미국 정부가 강제한 응급 911 서비스 기능과 정교한 위치기반 서비스의 출시에 의한 것으로 분석된다. iSuppli사는 GPS 기능의 핸드셋 시장이 2011년에는 4억 4,400만 명에 달해 지난 2006년의 1억 1,000만 명 수준에서 급성장 할 것으로 예측했다. 이 같은 수치는 출하되는 모든 휴대폰 중 29.6퍼센트에 달하는 제품이 GPS 기능을 갖는 것을 의미한다. 이 수치는 지난 해의 11퍼센트에서 상승한 것이다. 칩 부문 시장조사업체인 Forward Concepts사는 휴대폰에 사용되는 GPS 칩 시장은 2007에서 2011년 사이 연평균 40퍼센트의 성장률로 증가할 것이라고 예측했다. 이와 더불어, 최근 발표된 CIBC World Markets사의 보고서에서는 PND의 판매가 2007년 2,500만 대(도매가 75억 달러)에서 2010년에는 6,700만 대(140억 달러)로 증가할 것으로 전망했다. 아직 그 구조적 결정에 대해서는 판가름하기 어려운 상태이다. Presutti 씨와 Chadha 씨도 어떠한 접근법이 완전한 우위를 차지하기는 어려울 것이라고 강조했다. 하지만 휴대폰에서의 어태치 레이트가 이미 증가하고 있고 광대역 CDMA 핸드셋에서도 상당히 상승할 것으로 보여 Qualcomm사의 모델이 보다 우세한 고지를 점령한 듯하다. 따라서 SiRF 같은 기업들은 그들 매출의 상당부분을 PND에 의지하게 될 수 있다.
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